LED blinker
Introduction
For my experiments with the QMTECH XC7Z020 board, I would like to have the following development environment:
- recent version of the Vitis Core Development Kit
- recent version of the Linux kernel
- recent version of the Debian distribution on the development machine
- recent version of the Alpine distribution on the QMTECH XC7Z020 board
- basic project with all the QMTECH XC7Z020 peripherals connected
- mostly command-line tools
- shallow directory structure
Here is how I set it all up.
Pre-requirements
My development machine has the following installed:
-
Debian 12 (amd64)
-
Vitis Core Development Kit 2023.1
Here are the commands to install all the other required packages:
Source code
The source code is available at
https://github.com/pavel-demin/qmtech-xc7z020-notes
This repository contains the following components:
- Makefile that builds everything (almost)
- cfg directory with constraints and board definition files
- cores directory with IP cores written in Verilog
- projects directory with Vivado projects written in Tcl
- scripts directory with
- Tcl scripts for Vivado and SDK
- shell script that builds an SD card image
All steps of the development chain and the corresponding scripts are shown in the following diagram:
Syntactic sugar for IP cores
The projects/led_blinker_77_76 directory contains one Tcl file block_design.tcl that instantiates, configures and interconnects all the needed IP cores.
By default, the IP core instantiation and configuration commands are quite verbose:
With the Tcl’s flexibility, it’s easy to define a less verbose command that looks similar to the module instantiation in Verilog:
The cell
command and other helper commands are defined in the scripts/project.tcl script.
Getting started
Setting up the Vitis and Vivado environment:
Cloning the source code repository:
Building boot.bin
:
SD card image
Building an SD card image:
A pre-built SD card image can be downloaded from this link.
To write the image to a micro SD card, copy the contents of the SD card image zip file to a micro SD card.
More details about the SD card image can be found at this link.
Reprogramming FPGA
It’s possible to reprogram the FPGA by loading the bitstream file into /dev/xdevcfg
: