For my experiments with the Eclypse Z7 board, I’d like to have the following development environment:
- recent version of the Vitis Core Development Kit
- recent version of the Linux kernel
- recent version of the Debian distribution on the development machine
- recent version of the Alpine distribution on the Eclypse Z7 board
- basic project with all the Eclypse Z7 peripherals connected
- mostly command-line tools
- shallow directory structure
Here is how I set it all up.
My development machine has the following installed:
Here are the commands to install all the other required packages:
The source code is available at
This repository contains the following components:
- Makefile that builds everything (almost)
- cfg directory with constraints and board definition files
- cores directory with IP cores written in Verilog
- projects directory with Vivado projects written in Tcl
- scripts directory with
- Tcl scripts for Vivado and SDK
- shell script that builds an SD card image
Syntactic sugar for IP cores
By default, the IP core instantiation and configuration commands are quite verbose:
With the Tcl’s flexibility, it’s easy to define a less verbose command that looks similar to the module instantiation in Verilog:
cell command is defined in the scripts/project.tcl script as follows:
Setting up the Vitis and Vivado environment:
Cloning the source code repository:
SD card image
Building an SD card image:
A pre-built SD card image can be downloaded from this link.
To write the image to a micro SD card, copy the contents of the SD card image zip file to a micro SD card.
More details about the SD card image can be found at this link.
It’s possible to reprogram the FPGA by loading the bitstream file into